View MAX5187_140704.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

19-1582; Rev 0; 12/99
8-Bit, 40MHz, Current/Voltage-Output DACs
General Description
The MAX5187 is an 8-bit, current-output digital-to-analog converter (DAC) designed for superior performance in signal reconstruction or arbitrary waveform generation applications requiring analog signal reconstruction with low distortion and low-power operation. The voltage-output MAX5190 provides equal specifications, with on-chip precision resistors for voltage output operation. Both devices are designed for a 10pVs glitch operation to minimize unwanted spurious signal components at the output. An on-board +1.2V bandgap circuit provides a well-regulated, low-noise reference that can be disabled for external reference operation. The MAX5187/MAX5190 are designed to provide a high level of signal integrity for the least amount of power dissipation. They operate from a single supply of +2.7V to +3.3V. Additionally, these DACs have three modes of operation: normal, low-power standby, and full shutdown, which provides the lowest possible power dissipation with a 1A (max) shutdown current. A fast wake-up time (0.5s) from standby mode to full DAC operation allows for power conservation by activating the DAC only when required. The MAX5187/MAX5190 are packaged in a 24-pin QSOP and are specified for the extended (-40C to +85C) temperature range. For higher resolution, 10-bit versions, see the MAX5181/MAX5184 data sheet.
Features
o +2.7V to +3.3V Single-Supply Operation o Wide Spurious-Free Dynamic Range: 70dB at fOUT = 2.2MHz o Fully Differential Output o Low-Current Standby or Full Shutdown Modes o Internal +1.2V Low-Noise Bandgap Reference o Small 24-Pin QSOP Package
MAX5187/MAX5190
Ordering Information
PART MAX5187BEEG MAX5190BEEG TEMP. RANGE -40C to +85C -40C to +85C PIN-PACKAGE 24 QSOP 24 QSOP
Pin Configuration Applications
Signal Reconstruction Digital Signal Processing Arbitrary Waveform Generation (AWG) Imaging Applications
CREF 1 OUTP 2 OUTN 3 AGND 4 AVDD 5 DACEN 6 PD 7 CS 8 CLK 9 REN 10 DGND 11 DGND 12 24 REFO 23 REFR 22 DGND 21 DVDD 20 D7
TOP VIEW
MAX5187 MAX5190
19 D6 18 D5 17 D4 16 D3 15 D2 14 D1 13 D0
QSOP
________________________________________________________________ Maxim Integrated Products
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 1-800-835-8769.
8-Bit, 40MHz, Current/Voltage-Output DACs MAX5187/MAX5190
ABSOLUTE MAXIMUM RATINGS
AVDD, DVDD to AGND, DGND .................................-0.3V to +6V Digital Input to DGND...............................................-0.3V to +6V OUTP, OUTN, CREF to AGND .................................-0.3V to +6V VREF to AGND ..........................................................-0.3V to +6V AGND to DGND.....................................................-0.3V to +0.3V AVDD to DVDD .....................................................................3.3V Maximum Current into Any Pin............................................50mA Continuous Power Dissipation (TA = +70C) 24-Pin QSOP (derate 9.50mW/C above +70C)........762mW Operating Temperature Ranges MAX5187BEEG/MAX5190BEEG ....................-40C to +85C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(AVDD = DVDD = +3V 10%, AGND = DGND = 0, fCLK = 40MHz, IFS = 1mA, 400 differential output, CL = 5pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER STATIC PERFORMANCE Resolution Integral Nonlinearity Differential Nonlinearity Zero-Scale Error Full-Scale Error DYNAMIC PERFORMANCE Output Settling Time Glitch Impulse Spurious-Free Dynamic Range to Nyquist Total Harmonic Distortion to Nyquist Signal-to-Noise Ratio to Nyquist Clock and Data Feedthrough Output Noise ANALOG OUTPUT ANALOG OUTPUT Full-Scale Output Voltage Voltage Compliance of Output Output Leakage Current Full-Scale Output Current DAC External Output Resistor Load IFS RL DACEN = 0, MAX5187 only MAX5187 only MAX5187 only VFS -0.3 -1 0.5 1 400 400 0.8 1 1.5 mV V A mA SFDR THD SNR fCLK = 40MHz fCLK = 40MHz fCLK = 40MHz All 0s to all 1s fOUT = 550kHz fOUT = 2.2MHz fOUT = 550kHz fOUT = 2.2MHz fOUT = 550kHz fOUT = 2.2MHz 46 57 To 0.5LSB error band 25 10 72 70 -70 -68 52 52 50 10 -63 ns pVs dBc dB dB nVs pA/Hz N INL DNL Guaranteed monotonic MAX5182 MAX5191 (Note 1) 8 -1 -1 -1 -4 -20 4 0.25 0.25 +1 +1 +1 +4 +20 Bits LSB LSB LSB LSB SYMBOL CONDITIONS MIN TYP MAX UNITS
2
_______________________________________________________________________________________
8-Bit, 40MHz, Current/Voltage-Output DACs
ELECTRICAL CHARACTERISTICS (continued)
(AVDD = DVDD = +3V 10%, AGND = DGND = 0, fCLK = 40MHz, IFS = 1mA, 400 differential output, CL = 5pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER REFERENCE Output Voltage Range Output Voltage Temperature Drift Reference Output Drive Capability Reference Supply Rejection Current Gain (IFS / IREF) POWER REQUIREMENTS Analog Power-Supply Voltage Analog Supply Current Digital Power-Supply Voltage Digital Supply Current Standby Current Shutdown Current LOGIC INPUTS AND OUTPUTS Digital Input Voltage High Digital Input Voltage Low Digital Input Current Digital Input Capacitance TIMING CHARACTERISTICS DAC DATA to CLK Rise Setup Time DAC CLK Rise to DATA Hold Time CS Fall to CLK Rise Time CS Fall to CLK Fall Time DACEN Rise Time to VOUT PD Fall Time to VOUT Clock Period Clock High Time Clock Low Time tCLK tCH tCL 25 10 10 tDS tDH 10 0 5 5 0.5 50 ns ns ns ns s s ns ns ns VIH VIL IIN CIN VIN = 0 or DVDD 10 2 0.8 1 V V A pF AVDD IAVDD DVDD IDVDD ISTANDBY ISHDN PD = 0, DACEN = 1, digital inputs at 0 or DVDD PD = 0, DACEN = 0, digital inputs at 0 or DVDD PD = 1, DACEN = X, digital inputs at 0 or DVDD (X = don't care) PD = 0, DACEN = 1, digital inputs at 0 or DVDD 2.7 4.2 1 0.5 2.7 1.7 3.3 4 3.3 5 1.5 1 V mA V mA mA A VREF TCVREF IREFOUT 1.12 1.2 50 10 0.5 8 1.28 V ppm/C A mV/V mA/mA SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX5187/MAX5190
Note 1: Excludes reference and reference resistor (MAX5190) tolerance.
_______________________________________________________________________________________
3
8-Bit, 40MHz, Current/Voltage-Output DACs MAX5187/MAX5190
Typical Operating Characteristics
(AVDD = DVDD = +3V, AGND = DGND = 0, 400 differential output, IFS = 1mA, CL = 5pF, TA = +25C, unless otherwise noted.)
INTEGRAL NONLINEARITY vs. INPUT CODE
0.125 0.100 DNL (LSB) 0.075 INL (LSB) 0.050 0.025 0 -0.025 -0.050 0 32 64 96 128 160 192 224 256 INPUT CODE -0.025 -0.050 -0.075 0 32 64 96 128 160 192 224 256 INPUT CODE 1.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V)
MAX5187/90-01
DIFFERENTIAL NONLINEARITY vs. INPUT CODE
MAX5187/90-02
ANALOG SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX5187/90-03
0.150
0.100 0.075 0.050 0.025 0
3.0 ANALOG SUPPLY CURRENT (mA)
2.5
2.0 MAX5190 1.5 MAX5187
ANALOG SUPPLY CURRENT vs. TEMPERATURE
MAX5187/90-04
DIGITAL SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX5187/90-05
DIGITAL SUPPLY CURRENT vs. TEMPERATURE
MAX5187/90-06
3.0 ANALOG SUPPLY CURRENT (mA)
8 DIGITAL SUPPLY CURRENT (mA)
4.00 DIGITAL SUPPLY CURRENT (mA)
7 MAX5190 6 MAX5187 5 4
2.5
3.75 MAX5190 3.50 MAX5187 3.25
2.0 MAX5190 1.5 MAX5187
1.0 -40 -15 10 35 60 85 TEMPERATURE (C)
3 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V)
3.00 -40 -15 10 35 60 85 TEMPERATURE (C)
STANDBY CURRENT vs. SUPPLY VOLTAGE
MAX5187/90-07
STANDBY CURRENT vs. TEMPERATURE
MAX5187/90-08
SHUTDOWN CURRENT vs. SUPPLY VOLTAGE
MAX5187/90-09
610
600
0.14
STANDBY CURRENT (A)
MAX5190
STANDBY CURRENT (A)
600
SHUTDOWN CURRENT (A)
590
MAX5190
0.12
580 MAX5187 570
0.10 MAX5187 0.08
590 MAX5187 580
560
0.06
MAX5190
570 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V)
550 -40 -15 10 35 60 85 TEMPERATURE (C)
0.04 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V)
4
_______________________________________________________________________________________
8-Bit, 40MHz, Current/Voltage-Output DACs
Typical Operating Characteristics (continued)
(AVDD = DVDD = +3V, AGND = DGND = 0, 400 differential output, IFS = 1mA, CL = 5pF, TA = +25C, unless otherwise noted.)
SHUTDOWN CURRENT vs. TEMPERATURE
MAX5187/90-10
MAX5187/MAX5190
INTERNAL REFERENCE VOLTAGE vs. SUPPLY VOLTAGE
MAX5187/90-11
INTERNAL REFERENCE VOLTAGE vs. TEMPERATURE
MAX5187/90-12
0.13
1.28
1.28
SHUTDOWN CURRENT (A)
0.11
0.09
REFERENCE VOLTAGE (V)
REFERENCE VOLTAGE (V)
1.27
1.27
MAX5190 MAX5187
1.26 MAX5190 1.25 MAX5187
1.26 MAX5187 1.25 MAX5190
0.07
0.05
1.24
1.24
0.03 -40 -15 10 35 60 85 TEMPERATURE (C)
1.23 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V)
1.23 -40 -15 10 35 60 85 TEMPERATURE (C)
OUTPUT CURRENT vs. REFERENCE CURRENT
MAX5187/90-13
DYNAMIC RESPONSE RISE TIME
MAX5187/90-14
DYNAMIC RESPONSE FALL TIME
MAX5187/90-15
4
OUTPUT CURRENT (mA)
3 OUTP 150mV/ div 2 OUTP 150mV/ div
1
OUTN 150mV/ div
OUTN 150mV/ div
0 0 100 200 300 400 500 50ns/div 50ns/div REFERENCE CURRENT (A)
SETTLING TIME
MAX5187/90-16
FFT PLOT
fOUT = 2.2MHz fCLK = 40MHz
MAX5187/90-17
0 -10 -20 -30 OUTN 100mV/ div -40 -50 -60 -70 OUTP 100mV/ div -80 -90 -100 -110 -120 0 2 4
(dBc)
12.5ns/div
6 8 10 12 14 16 18 20 OUTPUT FREQUENCY (MHz)
_______________________________________________________________________________________
5
8-Bit, 40MHz, Current/Voltage-Output DACs MAX5187/MAX5190
Typical Operating Characteristics (continued)
(AVDD = DVDD = +3V, AGND = DGND = 0, 400 differential output, IFS = 1mA, CL = 5pF, TA = +25C, unless otherwise noted.)
SPURIOUS-FREE DYNAMIC RANGE vs. CLOCK FREQUENCY
MAX5187/90-18
SPURIOUS-FREE DYNAMIC RANGE vs. OUTPUT FREQUENCY AND CLOCK FREQUENCY
MAX5187/90-19
SIGNAL-TO-NOISE PLUS DISTORTION vs. OUTPUT FREQUENCY
62.2 62.0
MAX5187/90-20
100 90 80 SFDR (dBc)
78 fOUT = 50MHz fOUT = 20MHz fOUT = 40MHz 76 74 SFDR (dBc) 72 70 68 66 fOUT = 10MHz fOUT = 60MHz fOUT = 30MHz
62.4
70 60 50 40 0 15 20 25 30 35 40 45 50 55 60 CLOCK FREQUENCY (MHz)
SINAD (dB)
61.8 61.6 61.4 61.2 61.0 60.8
500 700 900 1100 1300 1500 1700 1900 2100 2300 OUTPUT FREQUENCY (kHz)
0
500
1000
1500
2000
2500
OUPUT FREQUENCY (kHz)
MULTITONE SPURIOUS-FREE DYNAMIC RANGE vs. OUTPUT FREQUENCY
MAX5187/90-21
SPURIOUS-FREE DYNAMIC RANGE vs. FULL-SCALE OUTPUT CURRENT
MAX5187/90-22
0 -10 -20 -30 SFDR (dBc) -40 -50 -60 -70 -80 -90 -100 -110 -120 0 2.5 5 7.5 10 12.5 15 17.5 OUTPUT FREQUENCY (MHz)
74 72 70 SFDR (dBc) 68 66 64 62 60 0.50 0.75 1.00 1.25
1.50
FULL-SCALE OUTPUT CURRENT (mA)
6
_______________________________________________________________________________________
8-Bit, 40MHz, Current/Voltage-Output DACs
Pin Description
PIN 1 2 3 4 5 NAME CREF OUTP OUTN AGND AVDD Reference Bias Bypass Positive Analog Output. Current output for MAX5187; voltage output for MAX5190. Negative Analog Output. Current output for MAX5187; voltage output for MAX5190. Analog Ground Analog Positive Supply, +2.7V to +3.3V DAC Enable, Digital Input 0: Enter DAC standby mode with PD = DGND 1: Power-up DAC with PD = DGND X: Enter shutdown mode with PD = DVDD (X = don't care) Power-Down Select 0: Enter DAC standby mode (DACEN = DGND) or power-up DAC (DACEN = DVDD) 1: Enter shutdown mode Active-Low Chip Select Clock Input Active-Low Reference Enable. Connect to DGND to activate on-chip +1.2V reference. Digital Ground Data Bit D0 (LSB) Data Bit D1-D6 Data Bit D7 (MSB) Digital Supply, +2.7V to +3.3V Reference Input Reference Output FUNCTION
MAX5187/MAX5190
6
DACEN
7 8 9 10 11, 12, 22 13 14-19 20 21 23 24
PD CS CLK REN DGND D0 D1-D6 D7 DVDD REFR REFO
_______________________________________________________________________________________
7
8-Bit, 40MHz, Current/Voltage-Output DACs MAX5187/MAX5190
REN 1.2V REF
AVDD
AGND
CS
DACEN
PD
REFO REFR CURRENTSOURCE ARRAY CREF
OUTP 9.6k* DAC SWITCHES OUTN OUTPUT LATCHES MSB DECODE CLK INPUT LATCHES OUTPUT LATCHES MSB DECODE INPUT LATCHES
400 *
400*
MAX5187 MAX5190
DVDD DGND
*INTERNAL 400 AND 9.6k RESISTORS FOR MAX5190 ONLY.
D7-D0
Figure 1. Functional Diagram
Detailed Description
The MAX5187/MAX5190 are 8-bit DACs capable of operating with clock speeds up to 40MHz. Each converter consists of separate input and DAC registers, followed by a current-source array capable of generating up to 1.5mA full-scale output current (Figure 1). An integrated +1.2V voltage reference and control amplifier determine the data converters' full-scale output currents/voltages. Careful reference design ensures close gain matching and excellent drift characteristics. The MAX5190's voltage-output operation features matched 400 on-chip resistors that convert the current array current into a voltage.
10A output drive capability, REFO must be buffered with an external amplifier if heavier loading is required. The MAX5187/MAX5190 also employ a control amplifier, designed to simultaneously regulate the full-scale output current (IFS) for both outputs of the devices. The output current is calculated as follows: IFS = 8 * IREF where I REF is the reference output current (I REF = VREFO / RSET) and IFS is the full-scale output current. R SET is the reference resistor that determines the amplifier's output current on the MAX5187 (Figure 2). This current is mirrored into the current-source array, where it is equally distributed between matched current segments and summed to valid output current readings for the DACs. The MAX5190 converts this output current into a differential output voltage (VOUT) with two internal, groundreferenced 400 load resistors. Using the internal +1.2V reference voltage, the MAX5190's integrated reference output current resistor (RSET = 9.6k) sets IREF to 125A and IFS to 1mA.
Internal Reference and Control Amplifier
The MAX5187/MAX5190 provide an integrated 50ppm/C, +1.2V, low-noise bandgap reference that can be disabled and overridden by an external reference voltage. REFO serves either as an external reference input or an integrated reference output. If REN is connected to DGND, the internal reference is selected and REFO provides a +1.2V output. Due to its limited
8
_______________________________________________________________________________________
8-Bit, 40MHz, Current/Voltage-Output DACs MAX5187/MAX5190
OPTIONAL EXTERNAL BUFFER FOR HEAVIER LOADS REN MAX4040 +1.2V BANDGAP REFERENCE REFO CCOMP* AGND VREF RSET AGND REFR
DGND
IREF
CURRENTSOURCE ARRAY
IFS
IREF =
RSET
RSET** 9.6k
MAX5187 MAX5190
*COMPENSATION CAPACITOR (CCOMP = 100nF)
**9.6k REFERENCE CURRENT SET RESISTOR INTERNAL TO MAX5190 ONLY. USE EXTERNAL RSET FOR MAX5188.
Figure 2. Setting IFS with the Internal +1.2V Reference and the Control Amplifier
DVDD 10F REN +1.21V BANDGAP REFERENCE REFO CURRENTSOURCE ARRAY IREF RSET 9.6k* IFS DGND 0.1F
AVDD
EXTERNAL +1.21V REFERENCE
REFR
MAX6520
AGND
AGND
MAX5187 MAX5190
*9.6k REFERENCE CURRENT SET RESISTOR INTERNAL TO MAX5190 ONLY. USE EXTERNAL RSET FOR MAX5188.
Figure 3. MAX5187/MAX5190 with External Reference _______________________________________________________________________________________ 9
8-Bit, 40MHz, Current/Voltage-Output DACs MAX5187/MAX5190
External Reference
To disable the MAX5187/MAX5190's internal reference, connect REN to DVDD. A temperature-stable external reference may now be applied to drive the REFO pin to set the full-scale output (Figure 3). Choose a reference that can supply at least 150A to drive the bias circuit that generates the cascode current for the current array. For improved accuracy and drift performance, choose a voltage reference with a fixed output voltage, such as the +1.2V, 25ppm/C MAX6520 bandgap reference.
Shutdown Mode
For lowest power consumption, the MAX5187/MAX5190 provide a power-down mode in which the reference, control amplifier, and current array are inactive and the DAC's supply current is reduced to 1A. To enter this mode, connect PD to DVDD. To return to active mode, connect PD to DGND and DACEN to DVDD. About 50s are required for the parts to leave shutdown mode and settle to their outputs' values prior to shutdown.
Timing Information
Figure 4 shows a detailed timing diagram for the MAX5187/MAX5190. With each high transition of the clock, the input latch is loaded with the digital value set by bits D7 through D0. The content of the input latch is then shifted to the DAC register, and the output updates at the rising edge of the next clock.
Standby Mode
To enter the lower power standby mode, connect the digital inputs PD and DACEN to DGND. In standby, both the reference and the control amplifier are active with the current array inactive. To exit this condition, DACEN must be pulled high with PD held at DGND. Both the MAX5187 and MAX5190 typically require 50s to wake up and allow both the outputs and the reference to settle.
tCLK
tCL
tCH
CLK
D0-D7 tDS
N-1
N tDH
N+1
OUT
N-1
N
N+1
Figure 4. Timing Diagram
Table 1. Power-Down Mode Selection
PD (POWER-DOWN SELECT) 0 0 1 X = Don't care 10 ______________________________________________________________________________________ DACEN (DAC ENABLE) 0 1 X POWER-DOWN MODE Standby Wake-Up Shutdown OUTPUT STATE MAX5187 MAX5190 MAX5187 MAX5190 High-Z AGND High-Z AGND
Last state prior to standby mode
8-Bit, 40MHz, Current/Voltage-Output DACs
Outputs
The MAX5187 output is designed to supply full-scale output currents of 1mA into 400 loads in parallel with a capacitive load of 5pF. The MAX5190 features integrated 400 resistors that restore the array current to proportional, differential voltages of 400mV. These differential output voltages can then be used to drive a balun transformer or a low-distortion, high-speed operational amplifier to convert the differential voltage into a single-ended voltage. transfer curve) or a line drawn between the endpoints of the transfer function once offset and gain errors have been nullified. For a DAC, the deviations are measured every single step. Differential Nonlinearity Differential nonlinearity (DNL) (Figure 5b) is the difference between an actual step height and the ideal value of 1LSB. A DNL error specification of less than 1LSB guarantees no missing codes and a monotonic transfer function. Offset Error Offset error (Figure 5c) is the difference between the ideal and the actual offset point. For a DAC, the offset point is the step value when the digital input is zero. This error affects all codes by the same amount and can usually be compensated by trimming.
MAX5187/MAX5190
Applications Information
Static and Dynamic Performance Definitions
Integral Nonlinearity Integral nonlinearity (INL) (Figure 5a) is the deviation of the values on an actual transfer function from either a best-straight-line fit (closest approximation to the actual
7 6 ANALOG OUTPUT VALUE 5 4 3 2 1 0 000 001 010 011 100 101 110 111 DIGITAL INPUT CODE AT STEP 001 (1/4 LSB ) AT STEP 011 (1/2 LSB )
6 ANALOG OUTPUT VALUE 5 4 3 1 LSB 2 1 0 000 001 010 011 100 101 DIGITAL INPUT CODE DIFFERENTIAL LINEARITY ERROR (+1/4 LSB) 1 LSB DIFFERENTIAL LINEARITY ERROR (-1/4 LSB)
Figure 5a. Integral Nonlinearity
Figure 5b. Differential Nonlinearity
3 ANALOG OUTPUT VALUE
ACTUAL DIAGRAM ANALOG OUTPUT VALUE
7
IDEAL FULL-SCALE OUTPUT GAIN ERROR (-1 1/4 LSB)
6 IDEAL DIAGRAM 5 ACTUAL FULL-SCALE OUTPUT
2 IDEAL DIAGRAM 1 ACTUAL OFFSET POINT IDEAL OFFSET POINT 000 001
OFFSET ERROR (+1 1/4 LSB)
4 0
0
010
011
000 100
101
110
111
DIGITAL INPUT CODE
DIGITAL INPUT CODE
Figure 5c. Offset Error
Figure 5d. Gain Error 11
______________________________________________________________________________________
8-Bit, 40MHz, Current/Voltage-Output DACs MAX5187/MAX5190
+3V +3V AVDD
10F
0.1F 0.1F
10F
0.1F 402 AVDD CLK DVDD CREF 402 OUTP OUTPUT 400* +5V
D0-D7
MAX5187 MAX5190
REFO 0.1F 400* REFR RSET** DGND REN AGND OUTN
402
MAX4108 -5V 402
*400 RESISTORS INTERNAL TO MAX5190 ONLY. **MAX5187 ONLY
Figure 6. Differential to Single-Ended Conversion Using a Low-Distortion Amplifier
Gain Error Gain error (Figure 5d) is the difference between the ideal and the actual full-scale output voltage on the transfer curve, after nullifying the offset error. This error alters the slope of the transfer function and corresponds to the same percentage error in each step. Settling Time Settling time is the amount of time required from the start of a transition until the DAC output settles its new output value to within the converter's specified accuracy. Digital Feedthrough Digital feedthrough is the noise generated on a DAC's output when any digital input transitions. Proper board layout and grounding will significantly reduce this noise, but there will always be some feedthrough caused by the DAC itself. Total Harmonic Distortion Total harmonic distortion (THD) is the ratio of the RMS sum of the input signal's first five harmonics to the fundamental itself. This is expressed as:
THD = 20
where V1 is the fundamental amplitude, and V2 through V5 are the amplitudes of the 2nd- through 5th-order harmonics. Spurious-Free Dynamic Range Spurious-free dynamic range (SFDR) is the ratio of RMS amplitude of the fundamental (maximum signal component) to the RMS value of the next-largest distortion component.
Differential to Single-Ended Conversion
The MAX4108 low-distortion, high-input bandwidth amplifier may be used to generate a voltage from the array current output of the MAX5187. The differential voltage across OUTP and OUTN is converted into a single-ended voltage by designing an appropriate operational amplifier configuration (Figure 6).
I/Q Reconstruction in a QAM Application
The low-distortion performance of two MAX5187/ MAX5190s supports analog reconstruction of in-phase (I) and quadrature (Q) carrier components typically used in quadrature amplitude modulation (QAM) architectures, where two separate buses carry the I and Q data. A QAM signal is both amplitude and phase modulated, created by summing two independently modulated carriers of identical frequency but different phase (90 phase difference).
2 2 2 2 V2 + V3 + V4 + V5 log V1

12
______________________________________________________________________________________
8-Bit, 40MHz, Current/Voltage-Output DACs MAX5187/MAX5190
AVDD DVDD +3V
+3V
I COMPONENT 8 MAX5187 MAX5190
BP FILTER
DIGITAL SIGNAL PROCESSOR
AVDD
DVDD
CARRIER FREQUENCY
0 90
IF
Q COMPONENT 8 MAX5187 MAX5190
BP FILTER
MAX2452
QUADRATURE MODULATOR
Figure 7. Using the MAX5187/MAX5190 for I/Q Signal Reconstruction
In a typical QAM application (Figure 7), the modulation occurs in the digital domain, and two DACs such as the MAX5187/MAX5190 may be used to reconstruct the analog I and Q components. The I/Q reconstruction system is completed by a quadrature modulator that combines the reconstructed components with in-phase and quadrature carrier frequencies and then sums both outputs to provide the QAM signal.
Using the MAX5187/MAX5190 for Arbitrary Waveform Generation
Designing a traditional AWG requires five major functional blocks (Figure 8a): clock generator, counter, waveform memory, digital-to-analog converter for waveform reconstruction, and output filter. The waveform memory contains a sequentially stored digital replica of the desired analog waveforms. This memory shares a common clock with the DAC. For each clock cycle, a counter adds one count to the address for the waveform memory. The memory then loads the next value to the DAC, which generates an analog output voltage corresponding to that data value until the next clock cycle. A DAC output filter can either be a simple or complex lowpass filter, depending on the AWG requirements for waveform function and frequencies. The main limitations of the AWG's flexibility
are DAC resolution and dynamic performance, memory length, clock/playback frequency, and filter characteristics. Although the MAX5187/MAX5190 offer high-frequency operation and excellent dynamics, they are suitable for relaxed requirements in resolution (8-bit AWGs). To increase an AWG's high-frequency accuracy, temperature stability, wideband tuning, and past phase continuous-frequency switching, the user may approach a direct digital synthesis (DDS) AWG (Figure 8b). This DDS loop supports standard waveforms that are repetitive, such as sine, square, TTL, and triangular waveforms. DDS allows for precise control of the data stream input to the DAC. Data for one complete output waveform cycle is sequentially stored in RAM. As the RAM addresses change, the DAC converts the incoming data bits into a corresponding voltage waveform. The resulting output signal frequency is proportional to the frequency rate at which the RAM addresses are changed.
Grounding and Power-Supply Decoupling
Grounding and power-supply decoupling strongly influence the MAX5187/MAX5190's performance. Unwanted digital crosstalk may couple through the input, reference, power-supply, and ground connections, which may affect dynamic specifications like signal-to-noise ratio or spurious-free dynamic range. In addition, electromagnet13
______________________________________________________________________________________
8-Bit, 40MHz, Current/Voltage-Output DACs MAX5187/MAX5190
AVDD
DVDD
LOWPASS RECONSTRUCTION FILTER
COUNTER CLOCK GENERATOR
ADR
WAVEFORM MEMORY (RAM)
8
MAX5187 MAX5190
400* VARIABLE fC
FILTERED WAVEFORM (ANALOG OUTPUT)
9.6k*
*MAX5187 ONLY
Figure 8a. Traditional Arbitrary Waveform Generation (AWG)
CLOCK GENERATOR AVDD A D D E R DATA PHASE ACCUMULATOR ADR WAVEFORM MEMORY (RAM) 8 DVDD LOWPASS RECONSTRUCTION FILTER
PIR
PHASE INCREMENT REGISTER
MAX5187 MAX5190
REFR 400* VARIABLE fC
ACCUMULATOR FEEDBACK LOOP FOR DATA BITS
FILTERED WAVEFORM (ANALOG OUTPUT)
9.6k*
*MAX5187 ONLY
Figure 8b. Direct Digital Synthesis AWG (DDS AWG)
ic interference (EMI) can either couple into or be generated by the MAX5187/MAX5190. Therefore, grounding and power-supply decoupling guidelines for highspeed, high-frequency applications should be closely followed. First, a multilayer PC board with separate ground and power-supply planes is recommended. High-speed signals should be run on controlled impedance lines directly above the ground plane. Since the MAX5187/ MAX5190 have separate analog and digital ground buses (AGND and DGND, respectively), the PC board should also have separate analog and digital ground sections with only one point connecting the two. Digital signals should run above the digital ground plane, and analog signals should run above the analog ground plane. Both devices have two power-supply inputs: analog VDD (AVDD) and digital VDD (DVDD). Each AVDD input should be decoupled with parallel 10F and 0.1F
14
ceramic chip capacitors. These capacitors should be as close to the pin as possible, and their opposite ends should be as close as possible to the ground plane. The DVDD pins should also have separate 10F and 0.1F capacitors adjacent to their respective pins. Try to minimize the analog load capacitance for proper operation. For best performance, bypass with low-ESR 0.1F capacitors to AVDD. The power-supply voltages should also be decoupled with large tantalum or electrolytic capacitors at the point they enter the PC board. Ferrite beads with additional decoupling capacitors forming a pi-network can also improve performance.
Chip Information
TRANSISTOR COUNT: 9464 SUBSTRATE CONNECTED TO AGND
______________________________________________________________________________________
8-Bit, 40MHz, Current/Voltage-Output DACs
Package Information
QSOP.EPS
MAX5187/MAX5190
______________________________________________________________________________________
15
8-Bit, 40MHz, Current/Voltage-Output DACs MAX5187/MAX5190
NOTES
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
16 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 1999 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

▲Up To Search▲

Price & Availability of MAX5187

	To Download MAX5187 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .